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EEE 491

Electrical and Electronics Engineering Design I

EEE 491 is the senior capstone where you stop solving textbook problems and actually build a working system end-to-end, in practice, a real-time speech-recognition pipeline on a Basys-3 FPGA that pulls together everything from analog front-ends and ADC interfacing to VHDL state machines, FFT/MFCC processing, and PCB layout. You work in teams through weekly lab demos (DEBUG, ADC, WINDOW, PCB, CTRL, FFT, MEL, DCT, COMPARE) that each deliver one piece of the chain, while the lectures layer on the engineering-process side: V-model, requirements, verification, project management. It's where signals, digital design, and circuits courses finally converge into one artifact, and it sets up EEE 492 next semester, where you finish and defend the full prototype.

Kredi3ECTS6.5FakülteFaculty of EngineeringBölümElectrical and Electronics EngineeringKoordinatörİsmail Enis Ungan

Ön koşulEEE 212 ve EEE 313 ve EEE 321

→ STARS müfredatı (resmi syllabus)

Haftalık müfredat 14 hafta

Hafta 114–20 Eyl

EEE491'e giriş: FPGA ve speech recognition

Lecture: Introduction to EEE491, discussion on the project, requirements. Speech Recognition. Introduction to FPGA, FPGA Design Flow. Lab: Identification of the groups. Introduction to FPGAs. Discussion on system components, presentation of Basys-3 board and “Using the Vivado Design Suit”. All lab assignments.

FPGA design flowspeech recognitionBasys-3 boardVivado Design Suite

Hafta 221–27 Eyl

Amplifier devreleri ve filter tasarımı

Lecture: Circuit design, Amplifier circuits, Operational Amplifier. Low-pass, high-pass, band-pass filters. Lab: Study of lab assignments.

operational amplifierlow-pass filterhigh-pass filterband-pass filter

Hafta 328 Eyl – 4 Eki

Finite-State Machine ve VHDL uygulaması

Lecture: Finite-State Machines (FSM), FSM state-transition diagrams. VHDL practice, variable vs. signal assignments. Lab: Study of lab assignments and Lab-DEBUG assignment demonstration

finite-state machine (FSM)state-transition diagramVHDLvariable vs. signal assignment

Hafta 45–11 Eki

VHDL pratiği ve PCB gürültüsü

Lecture: VHDL practice. Noise on PCB layout, coupling R, L, C. Lab: Study of lab assignments and Lab-ADC assignment demonstration

VHDLPCB layoutcoupling R, L, CLab-ADC

Hafta 512–18 Eki

FSM üzerine VHDL ve FPGA implementation

Lecture: VHDL practice on FSM. FPGA Design Implementation. Lab: Study of lab assignments and Lab-WINDOW assignment demonstration

VHDLFSMFPGA design implementationLab-WINDOW

Hafta 619–25 Eki

Sampling, aliasing ve A/D conversion

Lecture: Quantization, Sampling, Aliasing, A/D conversion, ADC datasheet, SPI interface. Lab: Study of lab assignments.

quantizationaliasingADC datasheetSPI interface

Hafta 726 Eki – 1 Kas

FFT IP block'a giriş

Lecture: Introduction to FFT IP block. Lab: Study of lab assignments and Lab-PCB assignment demonstration

FFT IP blockLab-PCB

Hafta 82–8 Kas

FFT IP block yapılandırması

Lecture: Configuration of FFT IP block. Lab: Study of lab assignments and Lab-CTRL assignment demonstration

FFT IP blockconfigurationLab-CTRL

Hafta 99–15 Kas

LTI sistemler, DFT ve leakage

Lecture: Linear Time-Invariant Systems, Fast Fourier Transform, Discrete Time Fourier Transform, Discrete Fourier Transform, Spreading of energy (leakage) and time-domain windowing Lab: Study of lab assignments and Lab-FFT assignment demonstration

linear time-invariant systemsFFT, DTFT, DFTleakagetime-domain windowing

Hafta 1016–22 Kas

Ürün geliştirme ve system engineering

Lecture: Product Development, System Engineering Lab: Study of lab assignments and Lab-MATLAB assignment demonstration tests.

product developmentsystem engineeringLab-MATLAB

Hafta 1123–29 Kas

V-model süreci ve system modeling

Lecture: Process V-model, System Modeling. Lab: Study of lab assignments and Lab-MEL assignment demonstration

V-modelsystem modelingLab-MEL

Hafta 1230 Kas – 6 Ara

Requirements engineering ve verification/validation

Lecture: Requirements Engineering, Testing (Verification and Validation) Lab: Study of lab assignments and Lab-DCT assignment demonstration

requirements engineeringverificationvalidationLab-DCT

Hafta 137–13 Ara

Project management ve lab çalışması

Lecture: Project Management Lab: Study of lab assignments and Lab-COMPARE assignment demonstration

project managementLab-COMPARE

Hafta 1414–20 Ara

FPGA ile System on Chip tasarımı

Lecture: System on Chip by FPGA, Embedded systems, FPGA SoC architecture examples, FPGA technology Lab: Study of lab assignments.

system on chip (SoC)embedded systemsFPGA SoC architectureFPGA technology

Önerilen kaynaklar 1 kitap

📖

Önerilen

Properties of sound signals and speech recognition. Recommended - Lecture Notes:

Bu dersi alınca · 3 öğrenme çıktısı

Conduct lab experiments in preparation for the term project; demonstrate and report on the results obtainedLab work
Develop mathematical models and conduct analysis for complex engineering problems,Quiz Term project Papers(s)/Reports
Design and implement a complete electrical and electronics engineering system involving multi-disciplinary work as a teamTerm project Papers(s)/Reports

Bilkent'in resmî syllabus'ünden. Sağdaki etiket o çıktının hangi değerlendirmeyle ölçüldüğünü söylüyor.

🤖 GenAI politikası

1. Students are permitted to use GenAI tools to generate VHDL design and testbench code for assignments. 2. Each group is required to prepare a comprehensive report detailing their use of GenAI throughout the design process. Students shall act as Lead Engineers overseeing the AI. 3. The report must include the initial problem definitions provided to the GenAI, as well as every subsequent prompt, data input, and clarification. The full, unedited chat history must be documented, including "Correct

Ders notları · henüz yok

EEE 491 için defter ekibi henüz not yazmadı.

İlk dosyayı sen atarsan: not, slayt, geçmiş sınav, çözüm, cheat-sheet, ne varsa. defter ekibi öğrenci paylaşımlarından bu dersin notlarını yazar. Drive linki / PDF / ZIP, hepsi olur.

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Geçmiş GPA dağılımı 33 dönem · ort. 2.64

Dönem	Course CPA
2025-2026 Fall	3.71	1 sec · 8 öğr
2024-2025 Fall	3.02	1 sec · 19 öğr
2024-2025 Spring	2.53	1 sec · 7 öğr
2023-2024 Fall	2.40	1 sec · 14 öğr
2023-2024 Spring	2.77	1 sec · 14 öğr
2022-2023 Fall	2.38	1 sec · 20 öğr
2022-2023 Spring	2.32	1 sec · 23 öğr
2021-2022 Fall	2.81	1 sec · 20 öğr
2021-2022 Spring	2.29	1 sec · 11 öğr
2020-2021 Fall	2.18	1 sec · 18 öğr

Aggregate course GPA · Bilkent STARS'tan public data. Hoca-bazlı per-section detayı için STARS evaluation report →. Öğrenci anket cevapları KVKK kapsamında defter'de tutulmaz. Tüm derslerin ortalamaları →

Bu dönem · 2026-2027 Güz · 1 şube · 50 kontenjan

haftada 2 saat ders + 4 saat lab/uygulama

İsmail Enis Ungan

Çar10:30–12:20Cmt13:30–17:20

kişilik

programıma ekle → CGPA'ya ekle kayıt tarihleri

Her dönem açılıyorSon yıllarda 23 güz ve 17 bahar döneminde açılmış. Yaz okulunda da 5 kez açılmış. Kaçırırsan bir sonraki dönem tekrar bulabilirsin.

⚠️ FZ engelleyen şartlar

Course Learning Outcomes: Course Learning Outcome Assessment Conduct lab experiments in preparation for the term project; demonstrate and report on the results obtained Lab work Develop mathematical models and conduct analysis for complex engineering problems, Quiz Term project Papers(s)/Reports Design and implement a complete electrical and electronics engineering system involving multi-disciplinary work as a team Term project Papers(s)/Reports

Hocalar 1 bu dönem · 5 geçmiş

Bu dönem (2026-2027 Fall) · 1 section

İsmail Enis Ungan

Geçmişte ders veren (5 kişi)

Tolga Mete Duman, Hayrettin Köymen, Yusuf Ziya İder, Tarık Reyhan, Özgür Aktaş

Bunu alınca açılanlar · 1 ders EEE 491'i ön koşul sayıyor

EEE 495Electrical and Electronics Engineering Design