Electrical and Electronics Engineering Design I

EEE 491 is the senior capstone where you stop solving textbook problems and actually build a working system end-to-end — in practice, a real-time speech-recognition pipeline on a Basys-3 FPGA that pulls together everything from analog front-ends and ADC interfacing to VHDL state machines, FFT/MFCC processing, and PCB layout. You work in teams through weekly lab demos (DEBUG, ADC, WINDOW, PCB, CTRL, FFT, MEL, DCT, COMPARE) that each deliver one piece of the chain, while the lectures layer on the engineering-process side: V-model, requirements, verification, project management. It's where signals, digital design, and circuits courses finally converge into one artifact, and it sets up EEE 492 next semester, where you finish and defend the full prototype.