This is where you stop treating transistors as ideal switches and start designing actual silicon: how MOSFETs really behave, how to size them for speed and power, and how a schematic turns into a layout that a foundry can fabricate. Most of the work happens in Cadence — you'll analyze CMOS gates with hand calculations, then build and verify combinational blocks (logic, adders) through homeworks and a substantial project that takes a circuit from schematic to DRC-clean layout. It bridges the device physics you saw earlier with the digital systems courses that assume gates "just work," and it's the gateway to chip-design electives and any serious hardware role.
→ STARS müfredatı (resmi syllabus)
İlk dosyayı sen atarsan — not, slayt, geçmiş sınav, çözüm, cheat-sheet, ne varsa — defter ekibi öğrenci paylaşımlarından bu dersin notlarını yazar. Drive linki / PDF / ZIP, hepsi olur.
| Dönem | Course CPA | |
|---|---|---|
| 2023-2024 Fall | 2.58 | 1 sec · 30 öğr |
| 2022-2023 Fall | 2.71 | 1 sec · 7 öğr |
| 2021-2022 Spring | 3.12 | 1 sec · 30 öğr |
| 2020-2021 Spring | 3.23 | 1 sec · 21 öğr |
| 2019-2020 Fall | 2.81 | 1 sec · 20 öğr |
| 2017-2018 Fall | 2.60 | 1 sec · 19 öğr |
| 2015-2016 Fall | 2.48 | 1 sec · 19 öğr |
| 2012-2013 Fall | 2.99 | 1 sec · 17 öğr |
| 2010-2011 Fall | 2.30 | 1 sec · 25 öğr |
| 2008-2009 Fall | 2.81 | 1 sec · 15 öğr |
Aggregate course GPA — Bilkent STARS'tan public data. Hoca-bazlı per-section detayı için STARS evaluation report →. Öğrenci anket cevapları KVKK kapsamında defter'de tutulmaz.
Minimum points to qualify for final exam (excluding project and final exam) is 15 out of 45.