EEE 515 is the graduate-level deep dive into how analog blocks actually get built on a CMOS process, where every gain stage is a tradeoff between bandwidth, noise, swing, and power rather than a clean textbook formula. You work through Razavi chapter by chapter, hand-analyzing single-stage and differential amplifiers with small-signal models, then verifying the same circuits in SPICE, sizing an op-amp for a real foundry's design rules, and characterizing the silicon (or a discrete equivalent) on the bench. Coming in you need solid undergraduate electronics and device physics; coming out you have the vocabulary and intuition that mixed-signal, RFIC, and data-converter design courses all assume you already speak.
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Bilkent'in resmî syllabus'ünden. Sağdaki etiket o çıktının hangi değerlendirmeyle ölçüldüğünü söylüyor.
İlk dosyayı sen atarsan: not, slayt, geçmiş sınav, çözüm, cheat-sheet, ne varsa. defter ekibi öğrenci paylaşımlarından bu dersin notlarını yazar. Drive linki / PDF / ZIP, hepsi olur.
| Dönem | Course CPA | |
|---|---|---|
| 2024-2025 Spring | 3.15 | 1 sec · 4 öğr |
| 2023-2024 Spring | 2.75 | 1 sec · 4 öğr |
| 2021-2022 Fall | 3.46 | 1 sec · 9 öğr |
| 2018-2019 Spring | 3.10 | 1 sec · 5 öğr |
| 2016-2017 Spring | 3.28 | 1 sec · 5 öğr |
| 2014-2015 Spring | 3.14 | 1 sec · 15 öğr |
| 2011-2012 Spring | 3.43 | 1 sec · 8 öğr |
| 2009-2010 Spring | 2.72 | 1 sec · 6 öğr |
| 2007-2008 Fall | 3.47 | 1 sec · 7 öğr |
Aggregate course GPA · Bilkent STARS'tan public data. Hoca-bazlı per-section detayı için STARS evaluation report →. Öğrenci anket cevapları KVKK kapsamında defter'de tutulmaz. Tüm derslerin ortalamaları →
Course Learning Outcomes: Course Learning Outcome Assessment Ability to mathematically analyze an analog CMOS discrete/integrated circuit using large-signal models and small-signal parameters. Midterm:Essay/written Final:Essay/written Homework Ability to use computer-aided-design tools for the analysis of analog CMOS discrete/integrated circuits Project Homework Ability to design an analog CMOS integrated circuit using computer-aided design tools satisfying the design-rules of the CMOS foundry P